A known power transistor module packaging structure for inverter control which can mount thereon a radiation heat sink, is a three-dimensional solid structure as disclosed in the Japanese Patent Laid-Open No. HEI 8-86473 and one having a multi-layered structure as disclosed in the Japanese Patent Laid-Open No. HEI 6-123449.
FIG. 4 shows the power transistor module packaging structure according to the Japanese Patent Laid-Open Publication No. HEI 8-86473. Disclosed in the publication is a power transistor module 100 which employs SIP (Single In-Line Package) having only a single line of hook-shaped lead pins 101 and is placed, by lead pins 101 extending in the side of a side section crossing at right angles a heat-sink mounted surface 102 and by way of the lead-through packaging method, at a position adjacent to an edge of a printed wiring board 103 in erect posture against a surface 104 of the printed wiring board 103 on which other electric components are packaged, and a radiation heat sink 105 is placed on the heat-sink mounted surface 102.
Electric connection between the power transistor module 100 and the printed wiring board 103 is realized with the lead pins 101. However, when the radiation heat sink 105 is mounted on the power transistor module 100, the weight of the assembly becomes heavy, which can not be supported only by the single line of lead pins 101, and for this reason, the power transistor module 100 and the radiation heat sink 105 are screwed into a supporting tool (a package mounting member) 106 and into the printed wiring board 103 so that the lead pins 101 will not be distorted or buckled when packaged due to the weight of the power transistor module 100 together with the radiation heat sink 105. Namely, the power transistor module 100 and the radiation heat sink 105 are mounted on the printed wiring board 13 with the supporting tool 106.
FIG. 5 shows the power transistor module packaging structure according to the Japanese Patent Laid-Open Publication No. HEI 6-123449. Disclosed in the publication is a power transistor module 200 which employs DIP (Dual In-Line Package) having two lines of hook-shaped lead pins 202 arranged on a surface of the. transistor module reverse to a heat-sink mounted surface 201. The module 200 is packaged, by the two lines of lead pins 202 and also by way of the lead-through packaging method, on the surface reverse to a surface 206 of the printed wiring board 203 on which other electric components 204, 205 or the like are packaged. The printed wiring board 203 is electrically connected to a molded board 207 and is also mounted on the molded board 207 by a section 208 for the electric connection, and a radiation heat sink 209 in a state of being mounted on this molded board 207 contacts the heat-sink mounted surface 201 of the power transistor module 200.
It should be noted that a control board (printed wiring board) 210 is mounted on the side reverse to the side where the radiation heat sink of the molded board (printed wiring board) 207 is mounted, so that the molded board 207 and the control board 210 constitute a two-layered structure.
In the power transistor module packaging structure disclosed in Japanese Patent Laid-Open No. HEI 8-86473, the supporting tool 106 as a separate component specifically used for mounting is required for mounting the power transistor module 100 as well as the radiation heat sink 105 onto the printed wiring board 103, so that the number of units of component and the number of assembling steps increase in the power transistor module packaging structure, and in addition, workability in the maintenance service therefor is inefficient.
In the power transistor module packaging structure disclosed in Japanese Patent Laid-Open No. HEI 6-123449, a power transistor module 200 is fixed to the printed wiring board 203 by the two lines of lead pins 202 by way of the lead-through packaging method, so that any particular component specifically used for mounting of the module or the like thereonto is not required, but the power transistor module 200 is packaged, due to the multi-layered structure, on a surface reverse to the surface 206 on which other electric components 204, 205 or the like are packaged, so that a lead-through soldering is required on two surfaces, one for the other electric components 204, 205 or the like and the other for the power transistor module 200, which disadvantageously results in an increase in the number of soldering steps.
In any of the modules based on the conventional technology, the radiation heat sinks 105, 209 are additionally supported by the board separately from the power transistor modules 100, 200, and the radiation heat sinks 105, 209 are contacted to the power transistor modules 100, 200 for thermal conduction according to a decided positional relation therebetween depending on the mounted positions of the two components, so that the radiation heat sinks 105, 209 and the power transistor modules 100, 200 are not contacted to each other for appropriate thermal conduction due to, for instance, errors in mounting positions for the radiation heat sinks 105, 209 as well as for power transistor modules 100, 200, so that the radiation heat sinks 105, 209 do not effectively function, which may cause overheating in the power transistor modules 100, 200.